Rx3/drmr2
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- Add Master output audio ports

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- Update .gitignore
This commit is contained in:
Arnaud G. GIBERT 2022-03-07 00:14:48 +01:00
parent f405ce33ad
commit 2debad5744
4 changed files with 52 additions and 12 deletions
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10
.gitignore vendored
View File

@ -1,7 +1,9 @@
drmr.so
drmr_ui.xml
drmr_ui.so
drmr.lv2
*~
drmr2.so
drmr2_ui.xml
drmr2_ui.so
drmr2.lv2
drmr2.ttl
build
/logo.xcf
/htest

14
drmr2-mkttl
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@ -70,7 +70,19 @@ add_port "," " a lv2:InputPort , atom:AtomPort;
lv2:name \"Control\";"
idx=1
add_port "," " a lv2:AudioPort, lv2:OutputPort;
lv2:index %d;
lv2:symbol \"master_out_1\";
lv2:name \"Master - Out 1\";"
add_port "," " a lv2:AudioPort, lv2:OutputPort;
lv2:index %d;
lv2:symbol \"master_out_2\";
lv2:name \"Master - Out 2\";"
out_id=0
while [[ "${out_id}" -lt "${outport_nb}" ]]

36
drmr2.c
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@ -166,7 +166,15 @@ connect_port(LV2_Handle instance,
break;
default:
if( port_index >= DRMR_LEFT_00 && port_index <= DRMR_RIGHT_31)
if( port_index == DRMR_MASTER_LEFT)
{
drmr->master_right = (float*)data;
}
else if( port_index == DRMR_MASTER_RIGHT)
{
drmr->master_left = (float*)data;
}
else if( port_index >= DRMR_LEFT_00 && port_index <= DRMR_RIGHT_31)
{
int outoff = (port_index - DRMR_LEFT_00) / 2;
@ -191,7 +199,7 @@ connect_port(LV2_Handle instance,
}
break;
}
}
}
@ -357,7 +365,8 @@ static void run(LV2_Handle instance, uint32_t n_samples) {
{
case 8:
{
if (!drmr->ignore_note_off) {
if (!drmr->ignore_note_off)
{
nn = data[1];
nn-=baseNote;
untrigger_sample(drmr,nn,offset);
@ -450,6 +459,12 @@ static void run(LV2_Handle instance, uint32_t n_samples) {
pthread_mutex_lock(&drmr->load_mutex);
for( j = 0; j<n_samples; j++)
{
drmr->master_left[j] = 0.0f;
drmr->master_right[j] = 0.0f;
}
for (i = 0;i < drmr->num_samples;i++)
{
int pos,lim;
@ -496,8 +511,12 @@ static void run(LV2_Handle instance, uint32_t n_samples) {
for (pos = datastart; pos < lim && pos < dataend; pos++)
{
drmr->left[i][pos] += cs->data[cs->offset]*coef_left;
drmr->right[i][pos] += cs->data[cs->offset]*coef_right;
drmr->master_left[pos] += cs->data[cs->offset]*coef_left;
drmr->left[i][pos] += cs->data[cs->offset]*coef_left;
drmr->master_right[pos] += cs->data[cs->offset]*coef_right;
drmr->right[i][pos] += cs->data[cs->offset]*coef_right;
cs->offset++;
}
}
@ -508,8 +527,11 @@ static void run(LV2_Handle instance, uint32_t n_samples) {
if (lim > n_samples) lim = n_samples;
for (pos = datastart; pos < lim && pos < dataend; pos++)
{
drmr->left[i][pos] += cs->data[cs->offset++]*coef_left;
drmr->right[i][pos] += cs->data[cs->offset++]*coef_right;
drmr->master_left[pos] += cs->data[cs->offset]*coef_left;
drmr->left[i][pos] += cs->data[cs->offset++]*coef_left;
drmr->master_right[pos] += cs->data[cs->offset]*coef_right;
drmr->right[i][pos] += cs->data[cs->offset++]*coef_right;
}
}

4
drmr2.h
View File

@ -72,6 +72,8 @@ typedef struct {
typedef enum {
DRMR_CONTROL = 0,
DRMR_MASTER_LEFT,
DRMR_MASTER_RIGHT,
DRMR_LEFT_00,
DRMR_RIGHT_00,
DRMR_LEFT_01,
@ -225,6 +227,8 @@ typedef struct {
typedef struct {
// Ports
float* master_left;
float* master_right;
float** left;
float** right;
LV2_Atom_Sequence *control_port;