2024-04-14 16:17:19 +02:00
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/*----------------------------------------------------------------------------*/
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/* lv2_plugin.c */
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/*----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------*/
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/* This file is part of Drummer. */
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/* */
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/* Drummer is free software: you can redistribute it and/or modify it */
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/* under the terms of the GNU General Public License as published by */
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/* the Free Software Foundation, either version 3 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* Drummer is distributed in the hope that it will be useful, */
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/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
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/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
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/* GNU General Public License for more details. */
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/* */
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/* You should have received a copy of the GNU General Public License */
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/* along with Drummer. If not, see <https://www.gnu.org/licenses/>. */
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/*----------------------------------------------------------------------------*/
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2022-04-20 12:37:32 +02:00
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/*----------------------------------------------------------------------------*/
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/* Includes */
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/*----------------------------------------------------------------------------*/
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2022-03-27 11:33:37 +02:00
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#define _LV2_PLUGIN_C_
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#include <drummer.h>
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2022-04-20 12:37:32 +02:00
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static int current_kit_changed = 0;
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2022-03-27 11:33:37 +02:00
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2022-04-20 12:37:32 +02:00
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/*----------------------------------------------------------------------------*/
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2023-07-28 01:14:53 +02:00
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/* DR_LV2_Log_Write */
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2022-04-20 12:37:32 +02:00
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/*----------------------------------------------------------------------------*/
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2022-05-14 23:53:23 +02:00
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DRT_Status DR_LV2_Log_Write( DRT_Log_Type_Id Log_Type_Id, char *Out_Fmt, va_list Args)
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{
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2023-07-28 01:14:53 +02:00
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LV2_URID type;
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2022-05-14 23:53:23 +02:00
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switch( Log_Type_Id)
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{
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case DRD_LOG_TYPE_ID_TRACE:
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{
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2023-07-28 01:14:53 +02:00
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type = DRG_LV2_Base.Logger.Trace;
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2022-05-14 23:53:23 +02:00
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break;
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}
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case DRD_LOG_TYPE_ID_INFO:
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{
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2023-07-28 01:14:53 +02:00
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type = DRG_LV2_Base.Logger.Note;
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2022-05-14 23:53:23 +02:00
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break;
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}
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case DRD_LOG_TYPE_ID_WARNING:
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{
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2023-07-28 01:14:53 +02:00
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type = DRG_LV2_Base.Logger.Warning;
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2022-05-14 23:53:23 +02:00
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break;
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}
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case DRD_LOG_TYPE_ID_ERROR:
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2023-07-28 01:14:53 +02:00
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case DRD_LOG_TYPE_ID_UNKNOWN:
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default:
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2022-05-14 23:53:23 +02:00
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{
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2023-07-28 01:14:53 +02:00
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type = DRG_LV2_Base.Logger.Error;
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2022-05-14 23:53:23 +02:00
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break;
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}
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2023-07-28 01:14:53 +02:00
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2022-05-14 23:53:23 +02:00
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}
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2023-07-28 01:14:53 +02:00
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if( lv2_log_vprintf( &(DRG_LV2_Base.Logger), type, Out_Fmt, Args) == 0)
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{
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fprintf( stderr, "LV2 logger error...\n");
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}
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2022-05-14 23:53:23 +02:00
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return( DRS_OK);
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}
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2023-07-28 01:14:53 +02:00
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/*----------------------------------------------------------------------------*/
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/* */
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/*----------------------------------------------------------------------------*/
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2024-04-10 23:53:45 +02:00
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/*
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2023-07-28 01:14:53 +02:00
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static inline void DR_LV2_Map_URIS( LV2_URID_Map *Map_Ptr, DRT_Drummer_URIS *URIS)
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{
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URIS->Atom_Object = Map_Ptr->map( Map_Ptr->handle, LV2_ATOM__Object);
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URIS->String_URId = Map_Ptr->map( Map_Ptr->handle, LV2_ATOM__String);
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URIS->Bool_URId = Map_Ptr->map( Map_Ptr->handle, LV2_ATOM__Bool);
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URIS->Int_URId = Map_Ptr->map( Map_Ptr->handle, LV2_ATOM__Int);
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2024-04-10 10:05:11 +02:00
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URIS->Long_URId = Map_Ptr->map( Map_Ptr->handle, LV2_ATOM__Long);
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URIS->Tuple_URId = Map_Ptr->map( Map_Ptr->handle, LV2_ATOM__Tuple);
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2023-07-28 01:14:53 +02:00
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URIS->Midi_Event = Map_Ptr->map( Map_Ptr->handle, "http://lv2plug.in/ns/ext/midi#MidiEvent");
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URIS->Atom_EventTransfer = Map_Ptr->map( Map_Ptr->handle, LV2_ATOM__eventTransfer);
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2024-04-10 23:53:45 +02:00
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URIS->UI_Msg = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#uimsg");
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2024-04-10 10:05:11 +02:00
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URIS->UI_Enable = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#uienable");
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URIS->UI_Disable = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#uidisable");
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2024-04-10 23:53:45 +02:00
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URIS->Kit_Update_Request = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#kitupdaterequest");
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URIS->Kit_Update_Reply = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#kitupdatereply");
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2024-04-08 10:01:34 +02:00
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2023-07-28 01:14:53 +02:00
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URIS->Velocity_Ignore_Flag_Toggle = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#velocitytoggle");
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URIS->Note_Off_Ignore_Flag_Toggle = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#noteofftoggle");
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/*
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URIS->kit_path = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#kitpath");
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URIS->get_state = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#getstate");
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URIS->midi_info = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#midiinfo");
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URIS->sample_trigger = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#sampletrigger");
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URIS->velocity_toggle = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#velocitytoggle");
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URIS->note_off_toggle = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#noteofftoggle");
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URIS->channel_id = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#channelid");
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URIS->zero_position = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#zeroposition");
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URIS->sample_add = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#sampleadd");
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URIS->sample_remove = Map_Ptr->map( Map_Ptr->handle, DRD_DRUMMER_URI "#sampleremove");
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*/
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2024-04-10 23:53:45 +02:00
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/*
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2023-07-28 01:14:53 +02:00
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}
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2024-04-10 23:53:45 +02:00
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*/
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2023-07-28 01:14:53 +02:00
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2022-05-14 23:53:23 +02:00
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/*----------------------------------------------------------------------------*/
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/* */
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/*----------------------------------------------------------------------------*/
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DRT_Status DR_LV2_Kit_Sample_Load( DRT_Kit *Kit_Ptr)
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2022-04-20 12:37:32 +02:00
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{
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2022-04-21 01:27:08 +02:00
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DRT_Status status;
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NDT_Node *cur_node_ptr;
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int sample_id = 0;
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2022-04-20 12:37:32 +02:00
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2022-04-21 01:27:08 +02:00
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if( Kit_Ptr != NULL)
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{
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2022-05-14 23:53:23 +02:00
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// fprintf( stderr, "Sample Rate: (%d)\n", DRG_LV2_Base.Base.SampleRate);
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2022-04-21 01:27:08 +02:00
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2022-04-27 23:13:33 +02:00
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if( ( status = DR_Kit_Sample_Load( Kit_Ptr)) == DRS_OK)
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2022-04-21 01:27:08 +02:00
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{
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2024-04-10 23:53:45 +02:00
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DRG_LV2_Base.Kit_Ptr = Kit_Ptr;
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2022-04-21 01:27:08 +02:00
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cur_node_ptr = Kit_Ptr->Instrument_DS_Ptr->Index_Tab[NDD_INDEX_PRIMARY].Head;
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2022-04-20 12:37:32 +02:00
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2022-05-14 23:53:23 +02:00
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pthread_mutex_lock( &( DRG_LV2_Base.Load_Mutex));
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2022-04-20 12:37:32 +02:00
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2022-04-21 01:27:08 +02:00
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for( sample_id = 0; sample_id < DRD_PORT_NUMBER_MAX; sample_id++)
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{
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2022-05-14 23:53:23 +02:00
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DRG_LV2_Base.Samples[sample_id].Active = 0;
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DRG_LV2_Base.Samples[sample_id].Offset = 0;
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DRG_LV2_Base.Samples[sample_id].Limit = 0;
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DRG_LV2_Base.Samples[sample_id].Velocity = 0;
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DRG_LV2_Base.Samples[sample_id].Layer_Ptr = 0;
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DRG_LV2_Base.Samples[sample_id].Data_Ptr = NULL;
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DRG_LV2_Base.Samples[sample_id].Data_Offset = 0;
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DRG_LV2_Base.Samples[sample_id].Sustained = false;
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2022-04-21 01:27:08 +02:00
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if( cur_node_ptr == NULL)
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{
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// fprintf( stderr, "Skip sample\n");
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2022-05-14 23:53:23 +02:00
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DRG_LV2_Base.Samples[sample_id].Instrument_Ptr = NULL;
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2022-04-21 01:27:08 +02:00
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}
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else
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{
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2022-05-14 23:53:23 +02:00
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DRG_LV2_Base.Samples[sample_id].Instrument_Ptr = (DRT_Instrument *)cur_node_ptr->Value;
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2022-04-21 01:27:08 +02:00
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cur_node_ptr = cur_node_ptr->Right;
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2022-05-14 23:53:23 +02:00
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// fprintf( stderr, "Add sample: [%s]\n", DRG_LV2_Base.Samples[sample_id].Instrument_Ptr->Name);
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2022-04-21 01:27:08 +02:00
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}
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}
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2022-05-14 23:53:23 +02:00
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pthread_mutex_unlock( &( DRG_LV2_Base.Load_Mutex));
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2022-04-21 01:27:08 +02:00
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2022-05-14 23:53:23 +02:00
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DRG_LV2_Base.Sample_Number = Kit_Ptr->Instrument_DS_Ptr->Index_Tab[NDD_INDEX_PRIMARY].Node_Number;
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DR_LOG_INFO_1( "Loaded: (%d) instruments!", DRG_LV2_Base.Sample_Number);
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2022-04-21 01:27:08 +02:00
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// DR_Kit_Dump( Kit_Ptr, 0);
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}
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}
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return( status);
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}
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2022-04-20 12:37:32 +02:00
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2022-04-21 01:27:08 +02:00
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/*----------------------------------------------------------------------------*/
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/* */
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/*----------------------------------------------------------------------------*/
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2022-05-14 23:53:23 +02:00
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DRT_Status DR_LV2_CurKit_Sample_Load()
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2022-04-21 01:27:08 +02:00
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{
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DRT_Status status;
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2024-04-14 16:17:19 +02:00
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DRT_Kit *kit_ptr;
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2022-04-21 01:27:08 +02:00
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DRT_Kit_Id kit_id;
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2024-04-10 23:53:45 +02:00
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if( DRG_LV2_Base.Kit_Id_New != DRG_LV2_Base.Kit_Id)
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{
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2024-04-14 16:17:19 +02:00
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DR_Kit_Id_Convert( &DRG_LV2_Base.Bank_Id_LSB_New, &DRG_LV2_Base.Bank_Id_MSB_New, &DRG_LV2_Base.Program_Id_New, DRG_LV2_Base.Kit_Id_New);
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2024-04-10 23:53:45 +02:00
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}
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2024-04-14 16:17:19 +02:00
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DR_Bank_Program_Id_Convert( &kit_id, DRG_LV2_Base.Bank_Id_LSB_New, DRG_LV2_Base.Bank_Id_MSB_New, DRG_LV2_Base.Program_Id_New);
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2022-04-21 01:27:08 +02:00
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2022-05-14 23:53:23 +02:00
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if( kit_id == DRG_LV2_Base.Kit_Id)
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2022-04-21 01:27:08 +02:00
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{
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2024-04-10 23:53:45 +02:00
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DR_LOG_INFO_5( "Same kit id: (%d) Bank/Program: (%d/%d/%d) Name: [%s]!",
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kit_id, DRG_LV2_Base.Bank_Id_LSB_New, DRG_LV2_Base.Bank_Id_MSB_New, DRG_LV2_Base.Program_Id_New, DRG_LV2_Base.Kit_Ptr->Name);
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status = DRS_OK;
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2022-04-21 01:27:08 +02:00
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}
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else
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{
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2024-04-14 16:17:19 +02:00
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if( ( status = DR_Kit_Logical_Id_Find( &kit_ptr, kit_id)) != DRS_OK)
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2022-04-21 01:27:08 +02:00
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{
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2024-04-14 16:17:19 +02:00
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DR_LOG_WARNING_4( "Can't find kit id: (%d) Bank/Program: (%d/%d/%d)!",
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kit_id, DRG_LV2_Base.Bank_Id_LSB_New, DRG_LV2_Base.Bank_Id_MSB_New, DRG_LV2_Base.Program_Id_New);
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2022-04-27 23:13:33 +02:00
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2022-05-14 23:53:23 +02:00
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if( DRG_LV2_Base.Kit_Id == DRD_ID_UNKNOWN)
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2022-04-27 23:13:33 +02:00
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{
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2024-04-14 16:17:19 +02:00
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DR_LOG_ERROR_0( "No Kit available!");
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2024-04-10 23:53:45 +02:00
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status = DRS_KO;
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2022-04-27 23:13:33 +02:00
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}
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else
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{
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2022-05-14 23:53:23 +02:00
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DR_LOG_INFO_5( "Keep kit id: (%d) Bank/Program: (%d/%d/%d) Name: [%s]!",
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2024-04-10 23:53:45 +02:00
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DRG_LV2_Base.Kit_Id, DRG_LV2_Base.Bank_Id_LSB, DRG_LV2_Base.Bank_Id_MSB, DRG_LV2_Base.Program_Id, DRG_LV2_Base.Kit_Ptr->Name);
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2022-04-27 23:13:33 +02:00
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}
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}
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else
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{
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2022-05-14 23:53:23 +02:00
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DR_LOG_INFO_5( "New kit id: (%d) Bank/Program: (%d/%d/%d) Name: [%s]!",
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2024-04-14 16:17:19 +02:00
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kit_id, DRG_LV2_Base.Bank_Id_LSB_New, DRG_LV2_Base.Bank_Id_MSB_New, DRG_LV2_Base.Program_Id_New, kit_ptr->Name);
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2022-05-14 23:53:23 +02:00
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DRG_LV2_Base.Bank_Id_LSB = DRG_LV2_Base.Bank_Id_LSB_New;
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DRG_LV2_Base.Bank_Id_MSB = DRG_LV2_Base.Bank_Id_MSB_New;
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DRG_LV2_Base.Program_Id = DRG_LV2_Base.Program_Id_New;
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DRG_LV2_Base.Kit_Id = kit_id;
|
2024-04-10 23:53:45 +02:00
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DRG_LV2_Base.Kit_Id_New = kit_id;
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|
2024-04-14 16:17:19 +02:00
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DRG_LV2_Base.Kit_Ptr = kit_ptr;
|
2022-04-21 01:27:08 +02:00
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|
2024-04-14 16:17:19 +02:00
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status = DR_LV2_Kit_Sample_Load( kit_ptr);
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2024-04-10 23:53:45 +02:00
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|
2024-04-13 09:54:07 +02:00
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DRG_LV2_Base.Kit_Updated_Flag = true;
|
2024-04-10 23:53:45 +02:00
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DR_LOG_INFO_0( "Sample loaded!");
|
2022-04-21 01:27:08 +02:00
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}
|
|
|
|
}
|
|
|
|
|
|
|
|
return( status);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
static void *DR_LV2_Load_Thread()
|
2022-04-21 01:27:08 +02:00
|
|
|
{
|
|
|
|
|
|
|
|
DRT_Status status;
|
|
|
|
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_0( "Start Load Thread!");
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
for(;;)
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_lock( &( DRG_LV2_Base.Load_Mutex));
|
|
|
|
pthread_cond_wait( &( DRG_LV2_Base.Load_Cond), &( DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2024-04-14 16:17:19 +02:00
|
|
|
DR_LOG_INFO_0( "Load_Thread: New load!");
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_unlock( &(DRG_LV2_Base.Load_Mutex));
|
2022-04-21 01:27:08 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( status = DR_LV2_CurKit_Sample_Load()) != DRS_OK)
|
2022-04-21 01:27:08 +02:00
|
|
|
{
|
2024-04-14 16:17:19 +02:00
|
|
|
fprintf( stderr, "Can't load kit sample (%d)!", status);
|
2022-04-21 01:27:08 +02:00
|
|
|
}
|
|
|
|
|
2023-07-28 01:14:53 +02:00
|
|
|
pthread_mutex_lock( &(DRG_LV2_Base.Load_Mutex));
|
|
|
|
pthread_mutex_unlock( &(DRG_LV2_Base.Load_Mutex));
|
2022-04-21 01:27:08 +02:00
|
|
|
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-04-21 01:27:08 +02:00
|
|
|
/*
|
2022-05-14 23:53:23 +02:00
|
|
|
// old_samples = DRG_LV2_Base.Samples;
|
|
|
|
// old_scount = DRG_LV2_Base.Num_Samples;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
request_orig = request = DRG_LV2_Base.Request_Buf[ DRG_LV2_Base.CurReq];
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
if( !strncmp( request, "file://", 7))
|
|
|
|
{
|
|
|
|
request += 7;
|
|
|
|
}
|
|
|
|
|
|
|
|
// loaded_samples = load_hydrogen_kit(request,drmr->rate,&loaded_count);
|
|
|
|
|
|
|
|
if( !loaded_samples)
|
|
|
|
{
|
|
|
|
fprintf(stderr,"Failed to load kit at: %s\n",request);
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_lock( &(DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
// DRG_LV2_Base.Num_Samples = 0;
|
|
|
|
// DRG_LV2_Base.Samples = NULL;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_unlock( &(DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
// just lock for the critical moment when we swap in the new kit
|
|
|
|
printf( "loaded kit at: %s\n", request);
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_lock( &(DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
// DRG_LV2_Base.Samples = loaded_samples;
|
|
|
|
// DRG_LV2_Base.Num_Samples = loaded_count;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_unlock( &(DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
// if( old_scount > 0) free_samples( old_samples, old_scount);
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DRG_LV2_Base.Current_Path = request_orig;
|
2022-04-20 12:37:32 +02:00
|
|
|
current_kit_changed = 1;
|
2022-04-21 01:27:08 +02:00
|
|
|
*/
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/*
|
|
|
|
static inline LV2_Atom *build_state_message(DrMr *drmr)
|
|
|
|
{
|
|
|
|
LV2_Atom_Forge_Frame set_frame;
|
|
|
|
LV2_Atom *msg = (LV2_Atom *)lv2_atom_forge_object( &drmr->forge, &set_frame, 1, drmr->uris.get_state);
|
|
|
|
|
|
|
|
|
|
|
|
if( drmr->current_path)
|
|
|
|
{
|
|
|
|
lv2_atom_forge_property_head( &drmr->forge, drmr->uris.kit_path, 0);
|
|
|
|
lv2_atom_forge_string( &drmr->forge, drmr->current_path, strlen( drmr->current_path));
|
|
|
|
}
|
|
|
|
|
|
|
|
lv2_atom_forge_property_head(&drmr->forge, drmr->uris.velocity_toggle,0);
|
|
|
|
lv2_atom_forge_bool(&drmr->forge, drmr->ignore_velocity?true:false);
|
|
|
|
lv2_atom_forge_property_head(&drmr->forge, drmr->uris.note_off_toggle,0);
|
|
|
|
lv2_atom_forge_bool(&drmr->forge, drmr->ignore_note_off?true:false);
|
|
|
|
lv2_atom_forge_property_head(&drmr->forge, drmr->uris.channel_nb,0);
|
|
|
|
lv2_atom_forge_int(&drmr->forge, drmr->channel_nb);
|
|
|
|
lv2_atom_forge_property_head(&drmr->forge, drmr->uris.zero_position,0);
|
|
|
|
lv2_atom_forge_int(&drmr->forge, drmr->zero_position);
|
|
|
|
lv2_atom_forge_pop(&drmr->forge,&set_frame);
|
|
|
|
|
|
|
|
return msg;
|
|
|
|
}
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
2022-05-11 12:52:37 +02:00
|
|
|
/*
|
2022-04-20 12:37:32 +02:00
|
|
|
static inline LV2_Atom *DR_LV2_Message_Midi_Info_Build( DRT_LV2_Base *LV2_Base_Ptr, uint8_t *Data)
|
|
|
|
{
|
|
|
|
LV2_Atom_Forge_Frame set_frame;
|
|
|
|
LV2_Atom *msg;
|
|
|
|
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
msg = (LV2_Atom *)lv2_atom_forge_object( &( DRG_LV2_Base.Forge), &set_frame, 1, DRG_LV2_Base.URIS.midi_info);
|
|
|
|
lv2_atom_forge_property_head( &( DRG_LV2_Base.Forge), DRG_LV2_Base.URIS.midi_event, 0);
|
|
|
|
lv2_atom_forge_write( &( DRG_LV2_Base.Forge), Data, 3);
|
|
|
|
lv2_atom_forge_pop( &( DRG_LV2_Base.Forge), &set_frame);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
return( msg);
|
|
|
|
}
|
2022-05-11 12:52:37 +02:00
|
|
|
*/
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2023-07-28 01:14:53 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
DRT_Status DR_UI_Port_Notify( LV2_URID URId, float Value)
|
|
|
|
{
|
|
|
|
LV2_Atom_Forge_Frame set_frame;
|
|
|
|
|
|
|
|
|
|
|
|
lv2_atom_forge_frame_time( &( DRG_LV2_Base.Forge), 0);
|
|
|
|
|
|
|
|
lv2_atom_forge_object( &( DRG_LV2_Base.Forge), &set_frame, 1, DRG_LV2_Base.URIS.UI_Msg);
|
|
|
|
lv2_atom_forge_property_head( &( DRG_LV2_Base.Forge), URId, 0);
|
|
|
|
lv2_atom_forge_float( &( DRG_LV2_Base.Forge), Value);
|
|
|
|
|
|
|
|
lv2_atom_forge_pop( &( DRG_LV2_Base.Forge), &set_frame);
|
|
|
|
|
|
|
|
DR_LOG_INFO_2( "Notify: URId: (%d) Value: (%d)!", URId, (int)Value);
|
|
|
|
|
|
|
|
return( DRS_OK);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/*
|
|
|
|
static inline void layer_to_sample( drmr_sample *sample, float gain)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
float mapped_gain = ( 1 - ( gain / GAIN_MIN));
|
|
|
|
|
|
|
|
|
|
|
|
if( mapped_gain > 1.0f) mapped_gain = 1.0f;
|
|
|
|
|
|
|
|
for( i = 0; i < sample->layer_count; i++)
|
|
|
|
{
|
|
|
|
if( sample->layers[i].min <= mapped_gain &&
|
|
|
|
(sample->layers[i].max > mapped_gain ||
|
|
|
|
(sample->layers[i].max == 1 && mapped_gain == 1)))
|
|
|
|
{
|
|
|
|
sample->limit = sample->layers[i].limit;
|
|
|
|
sample->info = sample->layers[i].info;
|
|
|
|
sample->data = sample->layers[i].data;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
fprintf(stderr,"Couldn't find layer for gain %f in sample\n\n",gain);
|
|
|
|
// to avoid not playing something, and to deal with kits like the
|
|
|
|
// k-27_trash_kit, let's just use the first layer
|
|
|
|
|
|
|
|
sample->limit = sample->layers[0].limit;
|
|
|
|
sample->info = sample->layers[0].info;
|
|
|
|
sample->data = sample->layers[0].data;
|
|
|
|
}
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static inline void DR_Layer_To_Sample( DRT_Sample *Sample_Ptr, float Gain)
|
|
|
|
{
|
|
|
|
NDT_Node *first_node_ptr, *cur_node_ptr;
|
|
|
|
DRT_Layer *cur_layer_ptr;
|
|
|
|
int i = 0;
|
|
|
|
DRT_Boolean found = DRD_FALSE;
|
|
|
|
// float mapped_gain = ( 1 - ( Gain / DRD_GAIN_MIN));
|
|
|
|
float mapped_gain = Gain;
|
|
|
|
|
|
|
|
|
|
|
|
if( mapped_gain > 1.0f) mapped_gain = 1.0f;
|
|
|
|
|
|
|
|
first_node_ptr = Sample_Ptr->Instrument_Ptr->Layer_DS_Ptr->Index_Tab[NDD_INDEX_PRIMARY].Head;
|
|
|
|
cur_node_ptr = first_node_ptr;
|
|
|
|
|
|
|
|
while( ( cur_node_ptr != NULL) && ( found == DRD_FALSE))
|
|
|
|
{
|
|
|
|
cur_layer_ptr = (DRT_Layer *)cur_node_ptr->Value;
|
|
|
|
|
|
|
|
if( ( cur_layer_ptr->Min <= mapped_gain) &&
|
|
|
|
( ( cur_layer_ptr->Max > mapped_gain) || ( ( cur_layer_ptr->Max == 1) && ( mapped_gain == 1))))
|
|
|
|
{
|
|
|
|
found = DRD_TRUE;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
cur_node_ptr = cur_node_ptr->Right;
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if( cur_node_ptr == NULL)
|
|
|
|
{
|
|
|
|
cur_node_ptr = first_node_ptr;
|
|
|
|
cur_layer_ptr = (DRT_Layer *)cur_node_ptr->Value;
|
|
|
|
i=0;
|
|
|
|
}
|
|
|
|
|
|
|
|
Sample_Ptr->Layer_Ptr = cur_layer_ptr;
|
|
|
|
Sample_Ptr->Data_Ptr = cur_layer_ptr->Sample_Ptr;
|
|
|
|
Sample_Ptr->Limit = cur_layer_ptr->Sample_Size;
|
|
|
|
Sample_Ptr->SF_Info_Ptr = cur_layer_ptr->SF_Info_Ptr;
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_3( "Layer: (%d) MGain: (%f) Gain: (%f)", i, mapped_gain, Gain);
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
static inline void DR_Sample_Trigger( int Sample_Id, uint8_t *const Data, uint32_t Offset)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
// need to mutex this to avoid getting the samples array
|
|
|
|
// changed after the check that the midi-note is valid
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_lock( &( DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_2( "Trigger Sample: Id: (%d) Offset: (%d)", Sample_Id, Offset);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( Sample_Id >= 0) && ( Sample_Id < DRG_LV2_Base.Sample_Number))
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-11 12:52:37 +02:00
|
|
|
/*
|
2022-04-20 12:37:32 +02:00
|
|
|
if( Data)
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
lv2_atom_forge_frame_time( &( DRG_LV2_Base.Forge), 0);
|
2022-04-20 12:37:32 +02:00
|
|
|
DR_LV2_Message_Midi_Info_Build( LV2_Base_Ptr, Data);
|
|
|
|
}
|
2022-05-11 12:52:37 +02:00
|
|
|
*/
|
2022-05-14 23:53:23 +02:00
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Active = 1;
|
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Offset = 0;
|
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Velocity = *( DRG_Base.Velocity_Ignore_Flag_Ptr) ? 1.0f : ( (float)Data[2]) / DRD_VELOCITY_MAX;
|
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Data_Offset = Offset;
|
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Sustained = false;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( DRG_LV2_Base.Samples[Sample_Id].Instrument_Ptr->Layer_DS_Ptr->Index_Tab[NDD_INDEX_PRIMARY].Node_Number > 0)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
// drmr currently has 32 hard-coded gains so just use the last gain
|
|
|
|
// to prevent a segfault
|
|
|
|
int gain_idx = Sample_Id < 32 ? Sample_Id : 31;
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
// DR_Layer_To_Sample( &(DRG_LV2_Base.Samples[Sample_Id]), *( DRG_LV2_Base.Gains[ gain_idx]));
|
|
|
|
DR_Layer_To_Sample( &(DRG_LV2_Base.Samples[Sample_Id]), DRG_LV2_Base.Samples[Sample_Id].Velocity);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( DRG_LV2_Base.Samples[Sample_Id].Limit == 0)
|
|
|
|
fprintf(stderr,"Failed to find layer at: %i for %f\n", Sample_Id, *( DRG_LV2_Base.Gains[ gain_idx]));
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_unlock( &( DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
static inline void DR_Sample_Untrigger( int Sample_Id, uint32_t Offset)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_lock( &( DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( DRG_LV2_Base.Sustain == true)
|
2022-04-29 20:48:54 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_2( "Sustains Sample: Id: (%d) Offset: (%d)", Sample_Id, Offset);
|
2022-04-29 20:48:54 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Sustained = true;
|
2022-04-29 20:48:54 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_2( "UnTrigger Sample: Id: (%d) Offset: (%d)", Sample_Id, Offset);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
if (nn >= 0 && nn < drmr->num_samples) {
|
|
|
|
if (drmr->samples[nn].layer_count > 0) {
|
|
|
|
layer_to_sample(drmr->samples+nn,*(drmr->gains[nn]));
|
|
|
|
if (drmr->samples[nn].limit == 0)
|
|
|
|
fprintf(stderr,"Failed to find layer at: %i for %f\n",nn,*drmr->gains[nn]);
|
|
|
|
}
|
|
|
|
drmr->samples[nn].active = 0;
|
|
|
|
drmr->samples[nn].dataoffset = offset;
|
|
|
|
}
|
|
|
|
*/
|
2022-05-14 23:53:23 +02:00
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Active = 0;
|
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Data_Offset = Offset;
|
|
|
|
DRG_LV2_Base.Samples[Sample_Id].Sustained = false;
|
2022-04-29 20:48:54 +02:00
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
pthread_mutex_unlock( &( DRG_LV2_Base.Load_Mutex));
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2022-04-29 20:48:54 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
static inline void DR_Sample_UnSustain( uint32_t Offset)
|
2022-04-29 20:48:54 +02:00
|
|
|
{
|
|
|
|
int sample_id;
|
|
|
|
|
|
|
|
|
|
|
|
for( sample_id =0; sample_id < DRD_PORT_NUMBER_MAX; sample_id++)
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( DRG_LV2_Base.Samples[sample_id].Sustained)
|
2022-04-29 20:48:54 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_Sample_Untrigger( sample_id, Offset);
|
2022-04-29 20:48:54 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
2023-07-28 01:14:53 +02:00
|
|
|
static LV2_Handle DR_LV2_Instantiate( const LV2_Descriptor *LV2_Descriptor_Ptr,
|
|
|
|
double SampleRate,
|
|
|
|
const char *Bundle_Path,
|
|
|
|
const LV2_Feature * const *LV2_Features_Ptr)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
DRT_Status status;
|
|
|
|
int i;
|
2022-05-14 23:53:23 +02:00
|
|
|
// DRT_LV2_Base *lv2_base_ptr;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
|
|
|
|
fprintf( stderr, "LV2 Instantiate\n");
|
2022-05-14 23:53:23 +02:00
|
|
|
/*
|
2022-04-20 12:37:32 +02:00
|
|
|
if( ( lv2_base_ptr = malloc( sizeof( DRT_LV2_Base))) == NULL)
|
|
|
|
{
|
|
|
|
fprintf( stderr, "Can't allocate LV2 Base!\n");
|
|
|
|
return( (LV2_Handle)NULL);
|
|
|
|
}
|
2022-05-14 23:53:23 +02:00
|
|
|
*/
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2024-04-13 09:54:07 +02:00
|
|
|
DRG_LV2_Base.Map_Ptr = NULL;
|
|
|
|
DRG_LV2_Base.Logger.log = NULL;
|
|
|
|
|
|
|
|
DRG_LV2_Base.Kit_Ptr = NULL;
|
|
|
|
DRG_LV2_Base.Kit_Id = DRD_ID_UNKNOWN;
|
|
|
|
DRG_LV2_Base.Kit_Id_New = DRD_ID_UNKNOWN;
|
|
|
|
DRG_LV2_Base.Bank_Id_LSB = -1;
|
|
|
|
DRG_LV2_Base.Bank_Id_LSB = -1;
|
|
|
|
DRG_LV2_Base.Program_Id = -1;
|
|
|
|
DRG_LV2_Base.Bank_Id_LSB_New = 0;
|
|
|
|
DRG_LV2_Base.Bank_Id_MSB_New = 0;
|
|
|
|
DRG_LV2_Base.Program_Id_New = 0;
|
|
|
|
DRG_LV2_Base.Kit_Updated_Flag = false;
|
|
|
|
DRG_LV2_Base.Current_Path = NULL;
|
|
|
|
DRG_LV2_Base.CurReq = -1;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
// DRG_LV2_Base.Channel_Id = 0;
|
2024-04-13 09:54:07 +02:00
|
|
|
DRG_LV2_Base.Zero_Position = 0;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2024-04-13 09:54:07 +02:00
|
|
|
DRG_LV2_Base.Sustain = false;
|
2022-04-29 20:48:54 +02:00
|
|
|
|
2024-04-13 09:54:07 +02:00
|
|
|
DRG_LV2_Base.Sample_Number = 0;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
while( *LV2_Features_Ptr != NULL)
|
|
|
|
{
|
2022-05-11 12:52:37 +02:00
|
|
|
fprintf( stderr, "Feature URI: [%s]\n", (*LV2_Features_Ptr)->URI);
|
2022-05-14 23:53:23 +02:00
|
|
|
|
|
|
|
if( !strcmp( ( *LV2_Features_Ptr)->URI, LV2_URID_URI "#map"))
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DRG_LV2_Base.Map_Ptr = (LV2_URID_Map *)( ( *LV2_Features_Ptr)->data);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if( !strcmp( ( *LV2_Features_Ptr)->URI, LV2_LOG__log))
|
|
|
|
{
|
|
|
|
DRG_LV2_Base.Logger.log = (LV2_Log_Log *)( ( *LV2_Features_Ptr)->data);
|
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
LV2_Features_Ptr++;
|
|
|
|
}
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( DRG_LV2_Base.Map_Ptr == NULL) || ( DRG_LV2_Base.Logger.log == NULL))
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( DRG_LV2_Base.Map_Ptr == NULL)
|
|
|
|
{
|
|
|
|
fprintf( stderr, "LV2 host does not support urid#map!\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
if( DRG_LV2_Base.Logger.log == NULL)
|
|
|
|
{
|
|
|
|
fprintf( stderr, "LV2 host does not support log#log!\n");
|
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2023-07-28 01:14:53 +02:00
|
|
|
// lv2_log_logger_init( &(DRG_LV2_Base.Logger), DRG_LV2_Base.Map_Ptr, DRG_LV2_Base.Logger.log);
|
|
|
|
lv2_log_logger_set_map( &(DRG_LV2_Base.Logger), DRG_LV2_Base.Map_Ptr);
|
|
|
|
|
|
|
|
// if( ( status = DR_DataStruct_Init( DR_LV2_Log_Write, (DRT_SampleRate)SampleRate, DRD_THREAD_NUMBER_DEFAULT)) != DRS_OK)
|
|
|
|
if( ( status = DR_DataStruct_Init( DRD_LOG_WRITER_DEFAULT, (DRT_SampleRate)SampleRate, DRD_THREAD_NUMBER_DEFAULT)) != DRS_OK)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
fprintf( stderr, "Can't init data structures (%d)!\n", status);
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
lv2_log_error( &(DRG_LV2_Base.Logger), "Test error log <%s>!\n", "Krash!");
|
|
|
|
DR_LOG_ERROR_1( "Test error log <%s>!", "Krash!");
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( pthread_mutex_init( &( DRG_LV2_Base.Load_Mutex), 0))
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
fprintf( stderr, "Could not initialize load_mutex!\n");
|
|
|
|
}
|
|
|
|
else if( pthread_cond_init( &( DRG_LV2_Base.Load_Cond), 0))
|
|
|
|
{
|
|
|
|
fprintf( stderr, "Could not initialize load_cond!\n");
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2024-04-10 10:05:11 +02:00
|
|
|
DR_LV2_Map_URIS( DRG_LV2_Base.Map_Ptr, &( DRG_LV2_Base.URIS));
|
2022-05-14 23:53:23 +02:00
|
|
|
|
|
|
|
lv2_atom_forge_init( &(DRG_LV2_Base.Forge), DRG_LV2_Base.Map_Ptr);
|
|
|
|
|
|
|
|
if( pthread_create( &DRG_LV2_Base.Load_Thread, 0, (void * (*)(void *))DR_LV2_Load_Thread, NULL))
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
fprintf( stderr, "Could not initialize loading thread!\n");
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( DRG_LV2_Base.Request_Buf = malloc( DRD_REQ_BUF_SIZE * sizeof(char *))) == NULL)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
fprintf( stderr, "Cant'allocate Request buffer!\n");
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
memset( DRG_LV2_Base.Request_Buf, 0, DRD_REQ_BUF_SIZE * sizeof(char *));
|
|
|
|
|
|
|
|
if( ( DRG_LV2_Base.Left = malloc( DRD_PORT_NUMBER_MAX * sizeof(float *))) == NULL)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
fprintf( stderr, "Cant'allocate Left buffer!\n");
|
|
|
|
// free( lv2_base_ptr);
|
|
|
|
|
|
|
|
return( NULL);
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( DRG_LV2_Base.Right = malloc( DRD_PORT_NUMBER_MAX * sizeof(float *))) == NULL)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
fprintf( stderr, "Cant'allocate Right buffer!\n");
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( DRG_LV2_Base.Gains = malloc( DRD_PORT_NUMBER_MAX * sizeof(float *))) == NULL)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
fprintf( stderr, "Cant'allocate Gains buffer!\n");
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( DRG_LV2_Base.Pans = malloc( DRD_PORT_NUMBER_MAX * sizeof(float *))) == NULL)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
fprintf( stderr, "Cant'allocate Pans buffer!\n");
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
for( i = 0; i < 32; i++)
|
|
|
|
{
|
|
|
|
DRG_LV2_Base.Gains[i] = NULL;
|
|
|
|
DRG_LV2_Base.Pans[i] = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if( ( status = DR_Kits_Load()) != DRS_OK)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-04-27 23:13:33 +02:00
|
|
|
fprintf( stderr, "Can't load kits (%d)!\n", status);
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( status = DR_LV2_CurKit_Sample_Load()) != DRS_OK)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-04-27 23:13:33 +02:00
|
|
|
fprintf( stderr, "Can't load kit sample (%d)!\n", status);
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2024-04-08 10:01:34 +02:00
|
|
|
DR_LOG_INFO_1( "DRG_Base_Ptr: (%lx)!", (char *)( &DRG_Base));
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
return( (LV2_Handle)&DRG_LV2_Base);
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
free( DRG_LV2_Base.Gains);
|
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
free( DRG_LV2_Base.Right);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
free( DRG_LV2_Base.Left);
|
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
free( DRG_LV2_Base.Request_Buf);
|
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
}
|
2022-05-14 23:53:23 +02:00
|
|
|
|
|
|
|
DR_DataStruct_DeInit();
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return( (LV2_Handle)NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static void DR_LV2_Connect_Port( LV2_Handle Instance_Ptr, uint32_t Port_Id, void *Data_Ptr)
|
|
|
|
{
|
|
|
|
DRT_LV2_Base *lv2_base_ptr = (DRT_LV2_Base *)Instance_Ptr;
|
|
|
|
DRT_Port_Index port_index = (DRT_Port_Index)Port_Id;
|
|
|
|
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
// DR_LOG_INFO_1( "LV2 Connect Port (%d)!", Port_Id);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
switch( port_index)
|
|
|
|
{
|
|
|
|
case DRD_LV2_CONTROL:
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Control_Port = (LV2_Atom_Sequence *)Data_Ptr;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case DRD_LV2_CORE_EVENT:
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Core_Event_Port = (LV2_Atom_Sequence *)Data_Ptr;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2022-05-11 12:52:37 +02:00
|
|
|
case DRD_LV2_CHANNEL_ID:
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( Data_Ptr) DRG_Base.Channel_Id_Ptr = (float *)Data_Ptr;
|
2022-05-11 12:52:37 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case DRD_LV2_BASE_NOTE:
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( Data_Ptr) DRG_Base.Base_Note_Ptr = (float *)Data_Ptr;
|
2022-05-11 12:52:37 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case DRD_LV2_VELOCITY_IGNORE_NOTE:
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( Data_Ptr) DRG_Base.Velocity_Ignore_Note_Ptr = (float *)Data_Ptr;
|
2022-05-11 12:52:37 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case DRD_LV2_NOTE_OFF_IGNORE_NOTE:
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( Data_Ptr) DRG_Base.Note_Off_Ignore_Note_Ptr = (float *)Data_Ptr;
|
2022-05-11 12:52:37 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case DRD_LV2_VELOCITY_IGNORE_FLAG:
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( Data_Ptr) DRG_Base.Velocity_Ignore_Flag_Ptr = (float *)Data_Ptr;
|
2022-05-11 12:52:37 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case DRD_LV2_NOTE_OFF_IGNORE_FLAG:
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( Data_Ptr) DRG_Base.Note_Off_Ignore_Flag_Ptr = (float *)Data_Ptr;
|
2022-04-20 12:37:32 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
{
|
|
|
|
if( port_index == DRD_LV2_MASTER_LEFT)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Master_Left = (float *)Data_Ptr;
|
|
|
|
}
|
|
|
|
else if( port_index == DRD_LV2_MASTER_RIGHT)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Master_Right = (float *)Data_Ptr;
|
|
|
|
}
|
|
|
|
else if( port_index >= DRD_LV2_LEFT_00 && port_index <= DRD_LV2_RIGHT_31)
|
|
|
|
{
|
|
|
|
int outoff = (port_index - DRD_LV2_LEFT_00) / 2;
|
|
|
|
|
|
|
|
if( ( port_index - DRD_LV2_LEFT_00) % 2)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Right[outoff] = (float *)Data_Ptr;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Left[outoff] = (float *)Data_Ptr;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if( port_index >= DRD_LV2_GAIN_00 && port_index <= DRD_LV2_GAIN_31)
|
|
|
|
{
|
|
|
|
int goff = port_index - DRD_LV2_GAIN_00;
|
|
|
|
lv2_base_ptr->Gains[goff] = (float *)Data_Ptr;
|
|
|
|
}
|
|
|
|
else if( port_index >= DRD_LV2_PAN_00 && port_index <= DRD_LV2_PAN_31)
|
|
|
|
{
|
|
|
|
int poff = port_index - DRD_LV2_PAN_00;
|
|
|
|
lv2_base_ptr->Pans[poff] = (float *)Data_Ptr;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
fprintf( stderr, "LV2 Connect Port: unknown port: (%d)!\n", Port_Id);
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2022-05-11 12:52:37 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static void DR_LV2_Activate( LV2_Handle instance)
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_0( "LV2 Activate!");
|
2022-05-11 12:52:37 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static void DR_LV2_Run( LV2_Handle Instance_Ptr, uint32_t N_Samples)
|
|
|
|
{
|
|
|
|
DRT_Status status;
|
2022-05-11 12:52:37 +02:00
|
|
|
int i, j, base_note;
|
2022-04-20 12:37:32 +02:00
|
|
|
DRT_LV2_Base *lv2_base_ptr = (DRT_LV2_Base *)Instance_Ptr;
|
|
|
|
|
|
|
|
|
|
|
|
// fprintf( stderr, "LV2 Run!\n");
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
base_note = (int)floorf( *( DRG_Base.Base_Note_Ptr));
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
const uint32_t event_capacity = lv2_base_ptr->Core_Event_Port->atom.size;
|
|
|
|
|
|
|
|
lv2_atom_forge_set_buffer( &lv2_base_ptr->Forge, (uint8_t *)lv2_base_ptr->Core_Event_Port, event_capacity);
|
|
|
|
|
|
|
|
LV2_Atom_Forge_Frame seq_frame;
|
|
|
|
lv2_atom_forge_sequence_head( &(lv2_base_ptr->Forge), &seq_frame, 0);
|
|
|
|
|
|
|
|
LV2_ATOM_SEQUENCE_FOREACH( lv2_base_ptr->Control_Port, ev_ptr)
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_0( "LV2 Event!");
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2023-07-28 01:14:53 +02:00
|
|
|
if( ev_ptr->body.type == lv2_base_ptr->URIS.Midi_Event)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
uint8_t nn;
|
|
|
|
uint8_t *const data = (uint8_t *const)(ev_ptr + 1);
|
|
|
|
uint32_t offset = ( ev_ptr->time.frames > 0 && ev_ptr->time.frames < N_Samples) ? ev_ptr->time.frames : 0;
|
|
|
|
uint8_t channel = *data & 15;
|
|
|
|
uint8_t controler;
|
|
|
|
uint8_t value;
|
|
|
|
|
|
|
|
|
2022-04-27 23:13:33 +02:00
|
|
|
// fprintf( stderr, " Midi Event!\n");
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( *( DRG_Base.Channel_Id_Ptr) == 0) || ( channel == ( *( DRG_Base.Channel_Id_Ptr) - 1)))
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
switch( ( *data) >> 4)
|
|
|
|
{
|
|
|
|
case 8: // Note Off
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( !*( DRG_Base.Note_Off_Ignore_Flag_Ptr))
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
nn = data[1];
|
2022-05-11 12:52:37 +02:00
|
|
|
nn -= base_note;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_Sample_Untrigger( nn, offset);
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case 9: // Note On
|
|
|
|
{
|
|
|
|
nn = data[1];
|
2022-05-11 12:52:37 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( nn == *( DRG_Base.Velocity_Ignore_Note_Ptr))
|
2022-05-11 12:52:37 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
*( DRG_Base.Velocity_Ignore_Flag_Ptr) = (float)( (int)*( DRG_Base.Velocity_Ignore_Flag_Ptr) ^ true);
|
|
|
|
DR_LOG_INFO_2( "Velocity Ignore: [%f] - [%f]", *( DRG_Base.Velocity_Ignore_Flag_Ptr), *( DRG_Base.Velocity_Ignore_Note_Ptr));
|
2023-07-28 01:14:53 +02:00
|
|
|
|
2024-04-08 10:01:34 +02:00
|
|
|
DR_UI_Port_Notify( DRG_LV2_Base.URIS.Velocity_Ignore_Flag_Toggle, *( DRG_Base.Velocity_Ignore_Flag_Ptr));
|
2022-05-11 12:52:37 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
if( nn == *( DRG_Base.Note_Off_Ignore_Note_Ptr))
|
2022-05-11 12:52:37 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
*( DRG_Base.Note_Off_Ignore_Flag_Ptr) = (float)( (int)*( DRG_Base.Note_Off_Ignore_Flag_Ptr) ^ true);
|
|
|
|
DR_LOG_INFO_2( "Note Off Ignore: [%f] - [%f]", *( DRG_Base.Note_Off_Ignore_Flag_Ptr), *( DRG_Base.Note_Off_Ignore_Note_Ptr));
|
2022-05-11 12:52:37 +02:00
|
|
|
|
2023-07-28 01:14:53 +02:00
|
|
|
DR_UI_Port_Notify( DRG_LV2_Base.URIS.Note_Off_Ignore_Flag_Toggle, *( DRG_Base.Note_Off_Ignore_Flag_Ptr));
|
2022-05-11 12:52:37 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2024-04-08 10:01:34 +02:00
|
|
|
if( nn == 26)
|
|
|
|
{
|
|
|
|
LV2_Atom_Forge_Frame set_frame;
|
|
|
|
|
|
|
|
|
2024-04-10 23:53:45 +02:00
|
|
|
DR_LOG_INFO_1( "Kit Update Reply: Kit_Id: (%d)", lv2_base_ptr->Kit_Id);
|
2024-04-08 10:01:34 +02:00
|
|
|
|
|
|
|
lv2_atom_forge_frame_time( &( DRG_LV2_Base.Forge), 0);
|
|
|
|
|
|
|
|
lv2_atom_forge_object( &( DRG_LV2_Base.Forge), &set_frame, 1, DRG_LV2_Base.URIS.UI_Msg);
|
|
|
|
|
2024-04-10 23:53:45 +02:00
|
|
|
lv2_atom_forge_property_head( &( DRG_LV2_Base.Forge), DRG_LV2_Base.URIS.Kit_Update_Reply, 0);
|
|
|
|
lv2_atom_forge_long( &( DRG_LV2_Base.Forge), lv2_base_ptr->Kit_Id);
|
2024-04-08 10:01:34 +02:00
|
|
|
|
|
|
|
lv2_atom_forge_pop( &( DRG_LV2_Base.Forge), &set_frame);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2024-04-10 23:53:45 +02:00
|
|
|
// DR_LOG_INFO_1( "ZZZ Update Kit Name Tab: [%d]", nn);
|
2024-04-08 10:01:34 +02:00
|
|
|
|
|
|
|
nn -= base_note;
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2024-04-08 10:01:34 +02:00
|
|
|
DR_Sample_Trigger( nn, data, offset);
|
|
|
|
}
|
2022-05-11 12:52:37 +02:00
|
|
|
}
|
2024-04-08 10:01:34 +02:00
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case 11: // Control Change
|
|
|
|
{
|
|
|
|
controler = data[1];
|
|
|
|
value = data[2];
|
|
|
|
|
|
|
|
switch( controler)
|
|
|
|
{
|
|
|
|
case 0: // Bank MSB Select
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_1( "Bank MSB select: (%d)!", value);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
lv2_base_ptr->Bank_Id_MSB_New = value;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case 32: // Bank LSB Select
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_1( "Bank LSB select: (%d)!", value);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
lv2_base_ptr->Bank_Id_LSB_New = value;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2022-04-29 20:48:54 +02:00
|
|
|
case 64: // Sustain
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_1( "Sustain: (%d)!", value);
|
2022-04-29 20:48:54 +02:00
|
|
|
|
|
|
|
if( value == 127)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Sustain = true;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Sustain = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if( !( lv2_base_ptr->Sustain))
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_Sample_UnSustain( offset);
|
2022-04-29 20:48:54 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
default:
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_WARNING_2( "Unhandled controler: (%d) value: (%d)!", controler, value);
|
2022-04-20 12:37:32 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case 12: // Program Change
|
|
|
|
{
|
|
|
|
value = data[1];
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_1( "Program change: (%d)!", value);
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
lv2_base_ptr->Program_Id_New = value;
|
|
|
|
|
2022-04-21 01:27:08 +02:00
|
|
|
pthread_cond_signal( &( lv2_base_ptr->Load_Cond));
|
2024-04-10 23:53:45 +02:00
|
|
|
|
|
|
|
break;
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
{
|
2022-04-27 23:13:33 +02:00
|
|
|
// fprintf( stderr, "Unhandeled status: (%i) Data 1: (%i) Data 2: (%d)\n", ( *data) >> 4, data[1], data[2]);
|
2022-04-20 12:37:32 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2023-07-28 01:14:53 +02:00
|
|
|
else if( ev_ptr->body.type == lv2_base_ptr->URIS.Atom_Object)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_0( "LV2 AO...");
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2024-04-10 10:05:11 +02:00
|
|
|
const LV2_Atom_Object *obj_ptr = (LV2_Atom_Object *)&( ev_ptr->body);
|
|
|
|
|
|
|
|
if( obj_ptr->body.otype == lv2_base_ptr->URIS.UI_Msg)
|
|
|
|
{
|
2024-04-10 23:53:45 +02:00
|
|
|
const LV2_Atom *ui_enable_ptr = NULL;
|
|
|
|
const LV2_Atom *ui_disable_ptr = NULL;
|
|
|
|
const LV2_Atom *kit_update_request_ptr = NULL;
|
|
|
|
const LV2_Atom *kit_update_reply_ptr = NULL;
|
2024-04-10 10:05:11 +02:00
|
|
|
|
|
|
|
|
|
|
|
lv2_atom_object_get( obj_ptr,
|
2024-04-10 23:53:45 +02:00
|
|
|
lv2_base_ptr->URIS.UI_Enable, &ui_enable_ptr,
|
|
|
|
lv2_base_ptr->URIS.UI_Disable, &ui_disable_ptr,
|
|
|
|
lv2_base_ptr->URIS.Kit_Update_Request, &kit_update_request_ptr,
|
|
|
|
lv2_base_ptr->URIS.Kit_Update_Reply, &kit_update_reply_ptr,
|
2024-04-10 10:05:11 +02:00
|
|
|
0);
|
|
|
|
|
|
|
|
|
2024-04-10 23:53:45 +02:00
|
|
|
if( ui_enable_ptr)
|
2024-04-10 10:05:11 +02:00
|
|
|
{
|
2024-04-10 23:53:45 +02:00
|
|
|
LV2_Atom_Forge_Frame obj_frame;
|
|
|
|
|
|
|
|
|
|
|
|
DR_LOG_INFO_0( "UI Enable!");
|
|
|
|
|
|
|
|
lv2_atom_forge_frame_time( &( DRG_LV2_Base.Forge), 0);
|
|
|
|
lv2_atom_forge_object( &( DRG_LV2_Base.Forge), &obj_frame, 1, DRG_LV2_Base.URIS.UI_Msg);
|
|
|
|
lv2_atom_forge_property_head( &( DRG_LV2_Base.Forge), DRG_LV2_Base.URIS.Kit_Update_Reply, 0);
|
|
|
|
lv2_atom_forge_long( &( DRG_LV2_Base.Forge), DRG_LV2_Base.Kit_Id); // Cur kit Id
|
|
|
|
lv2_atom_forge_pop( &( DRG_LV2_Base.Forge), &obj_frame);
|
|
|
|
|
|
|
|
DR_LOG_INFO_2( "Kit Update Reply: Kit_Id: (%ld) Kit_Name: [%s]", DRG_LV2_Base.Kit_Id, DRG_LV2_Base.Kit_Ptr->Name);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
2024-04-10 10:05:11 +02:00
|
|
|
DRT_Kit_Name *kit_name_tab;
|
|
|
|
long kit_number;
|
|
|
|
|
|
|
|
|
|
|
|
if( ( status = DR_Kits_Name_Get( &kit_name_tab, &kit_number)) != DRS_OK)
|
|
|
|
{
|
|
|
|
DR_LOG_ERROR_1( "Can't get kit names: (%d)", status);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
LV2_Atom_Forge_Frame obj_frame, tup_frame;
|
|
|
|
LV2_Atom_Forge_Ref ref;
|
|
|
|
|
|
|
|
DR_LOG_INFO_3( "Update Kit Name: Nb: (%d) First: [%s] Size: (%ld)", kit_number, kit_name_tab[0].Name, sizeof( DRT_Kit_Name) * kit_number);
|
2024-04-10 23:53:45 +02:00
|
|
|
/*
|
2024-04-10 10:05:11 +02:00
|
|
|
|
|
|
|
lv2_atom_forge_frame_time( &( DRG_LV2_Base.Forge), 0);
|
|
|
|
lv2_atom_forge_object( &( DRG_LV2_Base.Forge), &obj_frame, 1, DRG_LV2_Base.URIS.UI_Msg);
|
|
|
|
lv2_atom_forge_property_head( &( DRG_LV2_Base.Forge), DRG_LV2_Base.URIS.Kit_Name_Update, 0);
|
|
|
|
lv2_atom_forge_tuple( &( DRG_LV2_Base.Forge), &tup_frame);
|
|
|
|
|
2024-04-10 23:53:45 +02:00
|
|
|
lv2_atom_forge_long( &( DRG_LV2_Base.Forge), kit_number); // Max number of kit
|
|
|
|
lv2_atom_forge_long( &( DRG_LV2_Base.Forge), DRG_LV2_Base.Kit_Ptr->Id); // Cur kit Id
|
2024-04-10 10:05:11 +02:00
|
|
|
|
|
|
|
// ref = lv2_atom_forge_write( &( DRG_LV2_Base.Forge), &( kit_name_tab[i]), sizeof( DRT_Kit_Name) * kit_number);
|
|
|
|
// DR_LOG_INFO_1( "Forge: KNT Ref: (%lx)", ref);
|
|
|
|
|
|
|
|
lv2_atom_forge_pop( &( DRG_LV2_Base.Forge), &tup_frame);
|
|
|
|
lv2_atom_forge_pop( &( DRG_LV2_Base.Forge), &obj_frame);
|
|
|
|
|
2024-04-10 23:53:45 +02:00
|
|
|
DR_LOG_INFO_3( "Kit Name Update: Kit_Number: (%ld) Kit_Id: (%ld) Kit_Name: [%s]", kit_number, DRG_LV2_Base.Kit_Ptr->Id, DRG_LV2_Base.Kit_Ptr->Name);
|
|
|
|
|
2024-04-10 10:05:11 +02:00
|
|
|
}
|
2024-04-10 23:53:45 +02:00
|
|
|
*/
|
2024-04-10 10:05:11 +02:00
|
|
|
}
|
|
|
|
|
2024-04-10 23:53:45 +02:00
|
|
|
|
|
|
|
if( ui_disable_ptr)
|
2024-04-10 10:05:11 +02:00
|
|
|
{
|
|
|
|
DR_LOG_INFO_0( "UI Disable!");
|
|
|
|
}
|
|
|
|
|
2024-04-10 23:53:45 +02:00
|
|
|
|
|
|
|
if( kit_update_request_ptr)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Kit_Id_New = ( (const LV2_Atom_Long *)kit_update_request_ptr)->body;
|
|
|
|
|
|
|
|
DR_LOG_INFO_1( "Kit Update Request: Kit_Id: (%ld)!", lv2_base_ptr->Kit_Id_New);
|
|
|
|
|
|
|
|
pthread_cond_signal( &( lv2_base_ptr->Load_Cond));
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
if( kit_update_reply_ptr)
|
|
|
|
{
|
|
|
|
DR_LOG_ERROR_0( "Kit Update Reply: This shouldn't be received by me!");
|
|
|
|
}
|
2022-05-11 12:52:37 +02:00
|
|
|
/*
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
if( obj_ptr->body.otype == lv2_base_ptr->URIS.ui_msg)
|
|
|
|
{
|
|
|
|
const LV2_Atom *path = NULL;
|
|
|
|
const LV2_Atom *trigger = NULL;
|
|
|
|
const LV2_Atom *ignvel = NULL;
|
|
|
|
const LV2_Atom *ignno = NULL;
|
2022-05-11 12:52:37 +02:00
|
|
|
const LV2_Atom *channel_id = NULL;
|
2022-04-20 12:37:32 +02:00
|
|
|
const LV2_Atom *zerop = NULL;
|
|
|
|
const LV2_Atom *sample_add = NULL;
|
|
|
|
const LV2_Atom *sample_remove = NULL;
|
|
|
|
|
|
|
|
lv2_atom_object_get( obj_ptr,
|
|
|
|
lv2_base_ptr->URIS.kit_path, &path,
|
|
|
|
lv2_base_ptr->URIS.sample_trigger, &trigger,
|
|
|
|
lv2_base_ptr->URIS.velocity_toggle, &ignvel,
|
|
|
|
lv2_base_ptr->URIS.note_off_toggle, &ignno,
|
2022-05-11 12:52:37 +02:00
|
|
|
lv2_base_ptr->URIS.channel_id, &channel_id,
|
2022-04-20 12:37:32 +02:00
|
|
|
lv2_base_ptr->URIS.zero_position, &zerop,
|
|
|
|
lv2_base_ptr->URIS.sample_add, &sample_add,
|
|
|
|
lv2_base_ptr->URIS.sample_remove, &sample_remove,
|
|
|
|
0);
|
2022-05-11 12:52:37 +02:00
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
|
|
|
|
if( path)
|
|
|
|
{
|
|
|
|
int reqpos = ( lv2_base_ptr->CurReq + 1) % DRD_REQ_BUF_SIZE;
|
|
|
|
char *tmp = NULL;
|
|
|
|
|
|
|
|
|
|
|
|
if( reqpos >= 0 && lv2_base_ptr->Request_Buf[reqpos])
|
|
|
|
tmp = lv2_base_ptr->Request_Buf[reqpos];
|
|
|
|
lv2_base_ptr->Request_Buf[reqpos] = strdup( LV2_ATOM_BODY( path));
|
|
|
|
lv2_base_ptr->CurReq = reqpos;
|
|
|
|
|
|
|
|
if( tmp) free(tmp);
|
|
|
|
|
|
|
|
fprintf( stderr, "Path!\n");
|
|
|
|
}
|
2022-05-11 12:52:37 +02:00
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
if( trigger)
|
|
|
|
{
|
|
|
|
int32_t si = ( ( const LV2_Atom_Int *)trigger)->body;
|
|
|
|
uint8_t mdata[3];
|
|
|
|
uint32_t offset = ( ev_ptr->time.frames > 0 && ev_ptr->time.frames < N_Samples) ? ev_ptr->time.frames : 0;
|
|
|
|
|
|
|
|
fprintf(stderr, "Trigger event!\n");
|
|
|
|
|
|
|
|
mdata[0] = 0x90; // note on
|
2022-05-11 12:52:37 +02:00
|
|
|
mdata[1] = si + base_note;
|
2022-04-20 12:37:32 +02:00
|
|
|
mdata[2] = 0x7f;
|
|
|
|
|
|
|
|
DR_Sample_Trigger( lv2_base_ptr, si, mdata, offset);
|
|
|
|
}
|
2022-05-11 12:52:37 +02:00
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
if( ignvel)
|
2022-05-14 23:53:23 +02:00
|
|
|
DRG_Base.Velocity_Ignore_Flag = ((const LV2_Atom_Bool*)ignvel)->body;
|
2022-05-11 12:52:37 +02:00
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
if( ignno)
|
2022-05-11 12:52:37 +02:00
|
|
|
{
|
|
|
|
fprintf( stderr, "Change Note Off Ignore Flag!\n");
|
2022-05-14 23:53:23 +02:00
|
|
|
// DRG_Base.Note_Off_Ignore_Flag = ((const LV2_Atom_Bool*)ignno)->body;
|
2022-05-11 12:52:37 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if( channel_id)
|
2022-05-14 23:53:23 +02:00
|
|
|
DRG_Base.Channel_Id_Ptr = ((const LV2_Atom_Int*)channel_id)->body;
|
2022-05-11 12:52:37 +02:00
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
if( zerop)
|
|
|
|
lv2_base_ptr->Zero_Position = ((const LV2_Atom_Int*)zerop)->body;
|
2022-05-11 12:52:37 +02:00
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
if( sample_add)
|
|
|
|
{
|
|
|
|
fprintf(stderr, "Sample Add event!\n");
|
|
|
|
|
|
|
|
lv2_atom_forge_frame_time( &lv2_base_ptr->Forge, 0);
|
|
|
|
// build_update_message( lv2_base_ptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
if( sample_remove)
|
|
|
|
{
|
|
|
|
fprintf(stderr, "Sample Remove event (%d)\n", ( ( const LV2_Atom_Int *)sample_remove)->body);
|
|
|
|
|
|
|
|
lv2_atom_forge_frame_time( &(lv2_base_ptr->Forge), 0);
|
|
|
|
// build_update_message( lv2_base_ptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
fprintf( stderr, "LV2 AO End!\n");
|
|
|
|
}
|
|
|
|
else if( obj_ptr->body.otype == lv2_base_ptr->URIS.get_state)
|
|
|
|
{
|
2022-05-11 12:52:37 +02:00
|
|
|
fprintf( stderr, "Get state!\n");
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
lv2_atom_forge_frame_time( &(lv2_base_ptr->Forge), 0);
|
|
|
|
// build_state_message( lv2_base_ptr);
|
|
|
|
}
|
2022-05-11 12:52:37 +02:00
|
|
|
*/
|
2024-04-10 10:05:11 +02:00
|
|
|
}
|
|
|
|
}
|
2022-04-20 12:37:32 +02:00
|
|
|
else
|
|
|
|
{
|
2023-07-28 01:14:53 +02:00
|
|
|
DR_LOG_WARNING_2( "Unrecognized event (%d) != (%d)", ev_ptr->body.type, lv2_base_ptr->URIS.Atom_Object);
|
2022-04-20 12:37:32 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
if( ( lv2_base_ptr->curReq >= 0) &&
|
|
|
|
lv2_base_ptr->request_buf[lv2_base_ptr->curReq] &&
|
|
|
|
( !lv2_base_ptr->Current_Path || strcmp( lv2_base_ptr->Current_Path, lv2_base_ptr->Request_Buf[lv2_base_ptr->Cur_Req])))
|
|
|
|
{
|
|
|
|
pthread_cond_signal( &( lv2_base_ptr->Load_Cond));
|
|
|
|
}
|
|
|
|
*/
|
2024-04-13 09:54:07 +02:00
|
|
|
if( lv2_base_ptr->Kit_Updated_Flag)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Kit_Updated_Flag = false;
|
|
|
|
|
|
|
|
// Send Kit_Update_Reply
|
|
|
|
LV2_Atom_Forge_Frame obj_frame;
|
|
|
|
|
|
|
|
lv2_atom_forge_frame_time( &( DRG_LV2_Base.Forge), 0);
|
|
|
|
lv2_atom_forge_object( &( DRG_LV2_Base.Forge), &obj_frame, 1, DRG_LV2_Base.URIS.UI_Msg);
|
|
|
|
lv2_atom_forge_property_head( &( DRG_LV2_Base.Forge), DRG_LV2_Base.URIS.Kit_Update_Reply, 0);
|
|
|
|
lv2_atom_forge_long( &( DRG_LV2_Base.Forge), DRG_LV2_Base.Kit_Id); // Cur kit Id
|
|
|
|
lv2_atom_forge_pop( &( DRG_LV2_Base.Forge), &obj_frame);
|
|
|
|
|
|
|
|
DR_LOG_INFO_2( "Kit Update Reply: Kit_Id: (%ld) Kit_Name: [%s]", DRG_LV2_Base.Kit_Id, DRG_LV2_Base.Kit_Ptr->Name);
|
|
|
|
}
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
/*
|
|
|
|
if( current_kit_changed)
|
|
|
|
{
|
|
|
|
current_kit_changed = 0;
|
|
|
|
lv2_atom_forge_frame_time( &drmr->forge, 0);
|
|
|
|
build_update_message( drmr);
|
|
|
|
|
|
|
|
fprintf(stderr, "Kit Changes!\n");
|
|
|
|
}
|
|
|
|
*/
|
2022-05-14 23:53:23 +02:00
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
lv2_atom_forge_pop( &( lv2_base_ptr->Forge), &seq_frame);
|
|
|
|
|
|
|
|
pthread_mutex_lock( &( lv2_base_ptr->Load_Mutex));
|
|
|
|
|
|
|
|
for( j = 0; j < N_Samples; j++)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Master_Left[j] = 0.0f;
|
|
|
|
lv2_base_ptr->Master_Right[j] = 0.0f;
|
|
|
|
}
|
|
|
|
|
2022-04-21 01:27:08 +02:00
|
|
|
for( i = 0; i < DR_MIN( lv2_base_ptr->Sample_Number, 32); i++)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
int pos,lim;
|
|
|
|
DRT_Sample *cur_sample = lv2_base_ptr->Samples + i;
|
|
|
|
|
|
|
|
|
|
|
|
if( ( cur_sample->Active || cur_sample->Data_Offset) && ( cur_sample->Limit > 0))
|
|
|
|
{
|
|
|
|
float coef_right, coef_left;
|
|
|
|
|
|
|
|
|
|
|
|
// fprintf( stderr, ".");
|
|
|
|
|
|
|
|
if( i < 32)
|
|
|
|
{
|
|
|
|
float gain = DRD_DB_CO( *( lv2_base_ptr->Gains[i]));
|
|
|
|
float pan_right = ( ( *( lv2_base_ptr->Pans[i])) + 1 ) / 2.0f;
|
|
|
|
float pan_left = 1 - pan_right;
|
|
|
|
|
|
|
|
|
|
|
|
coef_right = ( pan_right * ( DRD_DB3SCALE * pan_right + DRD_DB3SCALEPO)) * gain * cur_sample->Velocity;
|
|
|
|
coef_left = ( pan_left * ( DRD_DB3SCALE * pan_left + DRD_DB3SCALEPO)) * gain * cur_sample->Velocity;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
coef_right = coef_left = 1.0f;
|
|
|
|
}
|
|
|
|
|
|
|
|
int data_start, data_end;
|
|
|
|
|
|
|
|
|
|
|
|
if( cur_sample->Active)
|
|
|
|
{
|
|
|
|
data_start = cur_sample->Data_Offset;
|
|
|
|
data_end = N_Samples;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
data_start = 0;
|
|
|
|
data_end = cur_sample->Data_Offset;
|
|
|
|
}
|
|
|
|
cur_sample->Data_Offset = 0;
|
|
|
|
|
|
|
|
for( j = 0; j < N_Samples; j++)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Left[i][j] = 0.0f;
|
|
|
|
lv2_base_ptr->Right[i][j] = 0.0f;
|
|
|
|
}
|
|
|
|
|
|
|
|
if( cur_sample->SF_Info_Ptr->channels == 1)
|
|
|
|
{ // play mono sample
|
|
|
|
lim = ( N_Samples < ( cur_sample->Limit - cur_sample->Offset) ? N_Samples : ( cur_sample->Limit - cur_sample->Offset));
|
|
|
|
|
|
|
|
for( pos = data_start; ( pos < lim) && ( pos < data_end); pos++)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Master_Left[pos] += cur_sample->Data_Ptr[ cur_sample->Offset] * coef_left;
|
|
|
|
lv2_base_ptr->Left[i][pos] += cur_sample->Data_Ptr[ cur_sample->Offset] * coef_left;
|
|
|
|
|
|
|
|
lv2_base_ptr->Master_Right[pos] += cur_sample->Data_Ptr[ cur_sample->Offset] * coef_right;
|
|
|
|
lv2_base_ptr->Right[i][pos] += cur_sample->Data_Ptr[ cur_sample->Offset] * coef_right;
|
|
|
|
|
|
|
|
cur_sample->Offset++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{ // play stereo sample
|
|
|
|
lim = ( cur_sample->Limit - cur_sample->Offset) / cur_sample->SF_Info_Ptr->channels;
|
|
|
|
|
|
|
|
if( lim > N_Samples) lim = N_Samples;
|
|
|
|
|
|
|
|
for( pos = data_start; ( pos < lim) && ( pos < data_end); pos++)
|
|
|
|
{
|
|
|
|
lv2_base_ptr->Master_Left[pos] += cur_sample->Data_Ptr[ cur_sample->Offset] * coef_left;
|
|
|
|
lv2_base_ptr->Left[i][pos] += cur_sample->Data_Ptr[ cur_sample->Offset++] * coef_left;
|
|
|
|
|
|
|
|
lv2_base_ptr->Master_Right[pos] += cur_sample->Data_Ptr[ cur_sample->Offset] * coef_right;
|
|
|
|
lv2_base_ptr->Right[i][pos] += cur_sample->Data_Ptr[ cur_sample->Offset++] * coef_right;
|
|
|
|
}
|
|
|
|
}
|
|
|
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|
|
|
|
if( cur_sample->Offset >= cur_sample->Limit) cur_sample->Active = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pthread_mutex_unlock( &( lv2_base_ptr->Load_Mutex));
|
|
|
|
}
|
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|
|
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|
|
|
|
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|
|
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|
2022-05-11 12:52:37 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static void DR_LV2_DeActivate( LV2_Handle instance)
|
|
|
|
{
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_0( "LV2 DeActivate!");
|
2022-05-11 12:52:37 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2022-04-20 12:37:32 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static void DR_LV2_Cleanup( LV2_Handle Instance_Ptr)
|
|
|
|
{
|
|
|
|
DRT_Status status;
|
|
|
|
DRT_LV2_Base *lv2_base_ptr = (DRT_LV2_Base *)Instance_Ptr;
|
|
|
|
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_0( "LV2 Cleanup!");
|
2022-04-20 12:37:32 +02:00
|
|
|
|
2022-04-27 23:13:33 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_Tasks_Dump();
|
|
|
|
DR_Kits_Stats_Dump();
|
2022-04-27 23:13:33 +02:00
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
if( ( status = DR_DataStruct_DeInit()) != DRS_OK)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
printf( "Can't deinit data structures (%d)!\n", status);
|
|
|
|
}
|
|
|
|
|
|
|
|
free( lv2_base_ptr->Gains);
|
|
|
|
free( lv2_base_ptr->Right);
|
|
|
|
free( lv2_base_ptr->Left);
|
|
|
|
free( lv2_base_ptr->Request_Buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static LV2_State_Status DR_LV2_Save_State( LV2_Handle instance,
|
|
|
|
LV2_State_Store_Function store,
|
|
|
|
void *handle,
|
|
|
|
uint32_t flags,
|
|
|
|
const LV2_Feature *const *features)
|
|
|
|
{
|
|
|
|
LV2_State_Status lv2_status = LV2_STATE_SUCCESS;
|
|
|
|
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_0( "LV2 Save State!");
|
2022-04-20 12:37:32 +02:00
|
|
|
return( lv2_status);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static LV2_State_Status DR_LV2_Restore_State( LV2_Handle instance,
|
|
|
|
LV2_State_Retrieve_Function retrieve,
|
|
|
|
void *handle,
|
|
|
|
uint32_t flags,
|
|
|
|
const LV2_Feature *const *features)
|
|
|
|
{
|
|
|
|
LV2_State_Status lv2_status = LV2_STATE_SUCCESS;
|
|
|
|
|
|
|
|
|
2022-05-14 23:53:23 +02:00
|
|
|
DR_LOG_INFO_0( "LV2 Restore State!");
|
2022-04-20 12:37:32 +02:00
|
|
|
return( lv2_status);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* LV2_State_Interface */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static const LV2_State_Interface DRG_LV2_State_Interface =
|
|
|
|
{
|
|
|
|
DR_LV2_Save_State,
|
|
|
|
DR_LV2_Restore_State
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
2023-07-28 01:14:53 +02:00
|
|
|
/* LV2_Extension_Data */
|
2022-04-20 12:37:32 +02:00
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static const void *DR_LV2_Extension_Data( const char *uri)
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
|
|
if( !strcmp( uri, LV2_STATE__interface))
|
|
|
|
{
|
|
|
|
return &DRG_LV2_State_Interface;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
|
2023-07-28 01:14:53 +02:00
|
|
|
LV2_SYMBOL_EXPORT const LV2_Descriptor *lv2_descriptor( uint32_t Index)
|
2022-03-27 11:33:37 +02:00
|
|
|
{
|
2023-07-28 01:14:53 +02:00
|
|
|
switch( Index)
|
2022-04-20 12:37:32 +02:00
|
|
|
{
|
|
|
|
case 0:
|
|
|
|
{
|
|
|
|
return &DRG_LV2_Descriptor;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
{
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
}
|
2022-03-27 11:33:37 +02:00
|
|
|
}
|